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root/JSOC/proj/tables/hmi_mech/std_flight.i
Revision: 1.1
Committed: Mon Jul 11 21:54:43 2011 UTC (12 years, 2 months ago) by production
Branch: MAIN
CVS Tags: Ver_6-0, Ver_6-1, Ver_6-2, Ver_6-3, Ver_6-4, Ver_9-1, Ver_5-14, Ver_LATEST, Ver_9-3, Ver_9-41, Ver_9-2, Ver_8-8, Ver_8-2, Ver_8-3, Ver_8-0, Ver_8-1, Ver_8-6, Ver_8-7, Ver_8-4, Ver_8-5, Ver_7-1, Ver_7-0, Ver_9-5, Ver_9-4, Ver_8-10, Ver_8-11, Ver_8-12, Ver_9-0, HEAD
Log Message: 
initial

File Contents

# Content
1 #! $Id: $
2 #! $Name: $
3 #! Description: Standard Image Configuration Table
4
5 #ID TapCfg ClearTable ReadTable CropTable LookupTable R N K
6 80 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 0 16 UNCOMPRESSED
7 81 4_PORT fclr_2800_t1.t f4_4096c_t4.t NONE NONE 0 16 UNCOMPRESSED
8 88 2_PORT_FG fclr_2800_t1.t f2d_4096b_t7.t NONE NONE 0 16 UNCOMPRESSED
9 89 2_PORT_HE fclr_2800_t1.t f2d_4096b_t7.t NONE NONE 0 16 UNCOMPRESSED
10 90 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 0 16 UNCOMPRESSED
11 91 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 0 14 7
12 92 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 0 14 6
13 93 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 2 12 5
14 94 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 2 12 4
15 95 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 4 10 3
16 96 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 4 10 2
17 97 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 0 16 UNCOMPRESSED
18 98 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE round_14to12.k 0 16 UNCOMPRESSED
19 99 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r round_14to12.k 0 16 UNCOMPRESSED
20 100 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r round_14to12.k 0 14 5
21 101 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r round_14to10.k 0 14 3
22 102 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 0 14 7
23 103 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 0 14 6
24 104 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 2 12 5
25 105 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 2 12 4
26 106 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 4 10 3
27 107 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 4 10 2
28 108 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 0 14 7
29 109 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 0 14 6
30 110 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 2 12 5
31 111 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 2 12 4
32 112 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 4 10 3
33 113 4_PORT fclr_2800_t1.t f4_4096emi_t0.t NONE NONE 4 10 2
34 114 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE inverse.k 0 16 UNCOMPRESSED
35 115 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r inverse.k 0 14 6
36 116 4_PORT fclr_2800_t1.t f4_4096c_t4.t NONE NONE 0 14 7
37 117 4_PORT fclr_2800_t1.t f4_4096c_t4.t NONE NONE 0 14 6
38 118 4_PORT fclr_2800_t1.t f4_4096c_t4.t NONE NONE 0 14 5
39 119 1_PORT_E fclr_6000_t2.t f1_4096a_t5.t NONE NONE 0 16 UNCOMPRESSED
40 120 1_PORT_F fclr_6000_t2.t f1_4096a_t5.t NONE NONE 0 16 UNCOMPRESSED
41 121 1_PORT_G fclr_6000_t2.t f1_4096a_t5.t NONE NONE 0 16 UNCOMPRESSED
42 122 1_PORT_H fclr_6000_t2.t f1_4096a_t5.t NONE NONE 0 16 UNCOMPRESSED
43 123 2_PORT_EF fclr_6000_t2.t f2s_4096b_t6.t NONE NONE 0 16 UNCOMPRESSED
44 124 2_PORT_GH fclr_6000_t2.t f2s_4096b_t6.t NONE NONE 0 16 UNCOMPRESSED
45 # Entries 130-154 used for bad load on20100324
46 #new entries: 24 March 2010
47 160 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 0 14 5
48 161 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 0 14 4
49 162 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 1 13 6
50 163 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 1 13 5
51 164 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 1 13 4
52 165 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 1 13 3
53 166 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 2 12 3
54 167 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 2 12 2
55 168 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 3 11 5
56 169 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 3 11 4
57 170 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 3 11 3
58 171 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE NONE 3 11 2
59 172 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 0 14 5
60 173 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 0 14 4
61 175 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 1 13 6
62 176 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 1 13 5
63 177 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 1 13 4
64 178 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 1 13 3
65 179 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 2 12 3
66 180 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 2 12 2
67 181 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 3 11 5
68 182 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 3 11 4
69 183 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 3 11 3
70 184 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r NONE 3 11 2
71
72 190 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_lut.k 0 14 4
73 191 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_lut.k 0 14 3
74 192 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_lut.k 0 14 2
75 193 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c5_lut.k 0 14 3
76 194 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c5_lut.k 0 14 2
77 195 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c5_lut.k 0 14 1
78 196 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_plin.k 0 14 5
79 197 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_plin.k 0 14 4
80 198 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_plin.k 0 14 3
81 199 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_5_plin.k 0 14 5
82 200 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_5_plin.k 0 14 4
83 201 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c3_5_plin.k 0 14 3
84 202 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_plin.k 0 14 4
85 203 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_plin.k 0 14 3
86 204 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_plin.k 0 14 2
87 205 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_5_plin.k 0 14 4
88 206 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_5_plin.k 0 14 3
89 207 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2047.r c4_5_plin.k 0 14 2
90 208 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE c3_plin.k 0 14 4
91 209 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE c3_5_plin.k 0 14 4
92 210 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE c4_plin.k 0 14 3
93 211 4_PORT fclr_2800_t1.t f4_4096b_t3.t NONE c4_5_plin.k 0 14 3
94 212 4_PORT fclr_2800_t1.t f4_4096b_t3.t circ2100.r c3_plin.k 0 14 4